Source "drivers/media/platform/sunxi/sun6i-csi/Kconfig" sun6i-mipi-csi2/sun6i_mipi_csi2_reg.h | 82 ++Ĭreate mode 100644 drivers/media/platform/sunxi/sun6i-mipi-csi2/KconfigĬreate mode 100644 drivers/media/platform/sunxi/sun6i-mipi-csi2/MakefileĬreate mode 100644 drivers/media/platform/sunxi/sun6i-mipi-csi2/sun6i_mipi_csi2.cĬreate mode 100644 drivers/media/platform/sunxi/sun6i-mipi-csi2/sun6i_mipi_csi2.hĬreate mode 100644 drivers/media/platform/sunxi/sun6i-mipi-csi2/sun6i_mipi_csi2_reg.hĭiff -git a/drivers/media/platform/sunxi/Kconfig b/drivers/media/platform/sunxi/Kconfig index 7151cc249afa.9684e07454ad 100644 - a/drivers/media/platform/sunxi/Kconfig +++ b/drivers/media/platform/sunxi/Kconfig -2,3 +2,4 "drivers/media/platform/sunxi/sun4i-csi/Kconfig" platform/sunxi/sun6i-mipi-csi2/Makefile | 4 + platform/sunxi/sun6i-mipi-csi2/Kconfig | 12 + Signed-off-by: Paul Kocialkowski Acked-by: Maxime Ripard ĭrivers/media/platform/sunxi/Kconfig | 1 +ĭrivers/media/platform/sunxi/Makefile | 1 + Is currently supported by this implementation. While up to 4 internal channels to the CSI controller exist, only one Only 8-bit and 10-bit Bayer formats are currently supported. MIPI CSI-2 sensor as its own subdev, all using the fwnode graph and It is represented as a V4L2 subdev to the CSI controller and takes a It is a standalone block, connected to the CSI controller on one sideĪnd to the MIPI D-PHY block on the other. The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridgeįound on Allwinner SoCs such as the A31 and V3/V3s. ARM: dts: sun8i: v3s: Add support for the ISP
#Allwinner a31 vs a31s driver
MAINTAINERS: Add entry for the Allwinner A31 ISP driver staging: media: Add support for the Allwinner A31 ISP soc: sunxi: mbus: Add A31 ISP compatibles to the list dt-bindings: media: sun6i-a31-csi: Add ISP output port dt-bindings: media: Add Allwinner A31 ISP bindings documentation
![allwinner a31 vs a31s allwinner a31 vs a31s](https://images.anandtech.com/doci/6604/CES2013-113713.jpg)
media: sunxi: Introduce a rewritten sun6i-csi driver media: sunxi: Remove the sun6i-csi driver implementation ARM: dts: sun8i: a83t: bananapi-m3: Enable MIPI CSI-2 with OV8865 ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node MAINTAINERS: Add entry for the Allwinner A83T MIPI CSI-2 bridge media: sunxi: Add support for the A83T MIPI CSI-2 controller dt-bindings: media: Add Allwinner A83T MIPI CSI-2 bindings documentation ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support MAINTAINERS: Add entry for the Allwinner A31 MIPI CSI-2 bridge driver media: sunxi: Add support for the A31 MIPI CSI-2 controller dt-bindings: media: Add Allwinner A31 MIPI CSI-2 bindings documentation
![allwinner a31 vs a31s allwinner a31 vs a31s](https://i1.wp.com/obscurehandhelds.com/wp-content/uploads/2013/07/newjxdquadcore.jpg)
dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 dt-bindings: sun6i-a31-mipi-dphy: Add optional direction property ARM: dts: sun8i: v3s: Parent the CSI module clock to the ISP PLL clk: sunxi-ng: v3s: Make the ISP PLL clock public Allwinner A31/A83T MIPI CSI-2 Support and A31 ISP Support X-Mailing-List: A31/A83T MIPI CSI-2 Support and A31 ISP Support Subject: media: sunxi: Add support for the A31 MIPI CSI-2 Received: (Authenticated sender: (Postfix) with ESMTPSA id 1FD79240009 Received: from ( )īy (Postfix) with ESMTP id 46F8561242 Received: from ( )īy (Postfix) with ESMTP id 5E1EBC43217
![allwinner a31 vs a31s allwinner a31 vs a31s](http://blogimage.geekbuying.com/wp-content/uploads/2014/04/20140401153731-1024x576.png)
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